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External Memory and Input /, Output, , DIRECT, MEMORY, ACCESS[DMA]
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Drawbacks of Programmed and InterruptDriven I/O, ▪Interrupt-driven I/O, though more efficient than simple programmed I/O, still, requires the active intervention of the processor to transfer data between, memory and an I/O module, and any data transfer must traverse a path, through the processor., ▪ Thus, both these forms of I/O suffer from two inherent drawbacks:, , 1. The I/O transfer rate is limited by the speed with which the processor can, test and, service a device., 1. The processor is tied up in managing an I/O transfer; a number of, , instructions must be executed for each I/O transfer, When large volumes of data are to be moved, a more efficient technique is, required: direct memory access (DMA).
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DMA Function, ▪The DMA module is capable of mimicking the processor and,, indeed, of taking over control of the system from the processor., , ▪It transfer data to and from memory over the system bus., ▪For this purpose, the DMA module must use the bus only when, the processor does not need it, or it must force the processor to, suspend operation temporarily., , ▪The latter technique is more common and is referred to as cycle, stealing, because the DMA module in effect steals a bus cycle.
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i te a block of data, it issues a, ▪When the processor wDsiMheAstoFrueandcotriworn, command to the DMA module, by sending to the DMA module the, following information:, • Whether a read or write is requested, using the read or write, control line, between the processor and the DMA, • The address of the I/O device involved, communicated on the data, lines, • The starting location in memory to read from or write to,, communicated, on the data lines and stored by the DMA module in its address register, •The number of words to be read or written, communicated via the data, lines and stored in the data count register
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DMA Function, , ▪The processor then continues with other work., ▪It has delegated this I/O operation to the DMA, module., , ▪The DMA module transfers the entire block of data,, one word at a time, directly to or from memory,, without going through the processor., , ▪When the transfer is complete, the DMA, module sendsan interrupt signal to the, processor., , ▪Thus, the processor is involved only at, the beginning and end of the transfer
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DMA and Interrupt Breakpoints during an, Instruction CyFci gulereshows where in the instruction cycle, ▪, the processor may be suspended., ▪, , In each case, the processor is suspended just, before it needs to use the bus., , ▪, , The DMA module then transfers one word and, returns control to the processor., , ▪, , This is not an interrupt; the processor does not, save a context and do something else., , ▪, , Rather, the processor pauses for one bus cycle., , ▪, , The overall effect is to cause the processor to, execute more slowly.
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Single-bus, detached, DMA, ❖All modules share the same system bus., ❖The DMA module, acting as a surrogate processor, uses, programmed I/O to exchange data between memory and an I/O, module through the DMA module., , ❖This configuration, while it may be inexpensive, is, clearly inefficient., , ❖As with processor controlled programmed I/O, each transfer of, a word consumes two bus cycles
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Single-bus, integrated DMAI/O, ▪The number of required bus cycles can be cut substantially, by integrating the DMA and I/O functions., , ▪This means that there is a path between the DMA module, and one, system bus., , or more I/O modules that does not include the, , ▪The DMA logic may actually be a part of an I/O module, or, it may be, a separate module that controls one or more, I/O modules.
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I/O, Bu, s, ▪I/O modules are connected to the DMA module using an I/, O bus, , ▪This, , reduces the number of I/O interfaces in the, DMA module to one and provides for an easily, expandable configuration., , ▪Here system is used by the DMA module only to, exchange data, , with memory., , ▪The exchange of data between the DMA and I/O, modules takes, , place using IO Bus.
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Thank, you!!